The shortest path problem is an important issue in communication networks which is used by many practical routing protocols. The aim of this paper is to present an intelligent model based on Hopfield neural networks (HNNs) for solving shortest path problem and implement that on Field Programmable Gate Arrays (FPGAs) chips. The Cyclone Π-EP2C70F896C6 FPGA chip from ALTERA Inc. is considered for hardware implementing and VHDL language is employed for hardware description. The synthesizing results show the proposed architecture of neuron is more efficient than relevant neuron model for chip area utilization and consequently improving the maximum operating frequency and power consumption. The proposed router core is employed to find shortest paths in ring, star and mesh communication networks and the results demonstrate the efficiency and superiority of proposed core.
This article deals with a neural network based on Min/Max nodes and its utilisation for image recognition purposes. The general concepts of the Min/Max nodes and the single-layer neural networks are outlined. The developed software systems for simulation are briefly introduced and the results of simulations with the various settings of a neural net are presented. The subject of simulations was the recognition of human faces. Finally, the hardware design of the neural network in VHDL is shown. The design demonstrates the ease of systems realisation and the achieving of high performance.